This document relates generally to semiconductor devices, and more specifically to insulated gate structures and methods of formation.
In a typical insulated gate field effect transistor (IGFET) device, a gate electrode provides turn-on and turn-off control with the application of an appropriate gate voltage. By way of example, in an n-type enhancement mode IGFET device turn-on occurs when a conductive n-type inversion layer (i.e., channel region) is formed in a p-type body region in response to the application of a positive gate voltage, which exceeds an inherent threshold voltage. The inversion layer connects n-type source regions to n-type drain regions and allows for majority carrier conduction between these regions.
There is a class of IGFET devices where the gate electrode is formed in a trench that extends downward from a major surface of a semiconductor material such as silicon. Current flow in this class of devices is primarily vertical, and, as a result, device cells can be more densely packed. All else being equal, increased cell density increases the current carrying capability and reduces on-resistance of the device.
There is a further class of IGFET devices in which the drain terminal is placed on the front side of the substrate (i.e., the side where active devices typically are formed), and the source terminal is placed on the back side of the substrate. Such configurations may be referred to as “source-down” or “source-substrate connection” devices. Source-down devices have several advantages in some applications including improved circuit integration (for example, co-integration of high-side and low-side devices) and better heat dissipation.
However, source-down devices have several manufacturing related challenges. Specifically, in order to ensure that a parasitic bipolar transistor formed by the source, body, and substrate regions is not turned on, the buried source region must be shorted to the body region in a reliable and cost effective manner. In addition, prior art source-down devices often require up to ten (10) masking steps, which adds significant manufacturing costs.
Accordingly, structures and methods of manufacture are needed to provide cost-effective and reliable IGFET devices having a source-down connection configuration. Additionally, it would be beneficial if such structures and methods produce a device having improved switching and blocking voltage performance.
For simplicity and clarity of illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures denote generally the same elements. Additionally, descriptions and details of well-known steps and elements may be omitted for simplicity of the description. As used herein current-carrying electrode means an element of a device that carries current through the device—such as a source or a drain of an MOS transistor, or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode. Also, a control electrode means an element of the device that controls current through the device—such as a gate of a MOS transistor, or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel devices, a person of ordinary skill in the art will appreciate that P-channel devices and complementary devices are also possible in accordance with the present description. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight-line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants, the edges of doped regions are generally not straight lines and the corners are not precise angles.
Further, the term “major surface” when used in conjunction with a semiconductor region or substrate means the surface of the semiconductor region or substrate that forms an interface with another material such as a dielectric or insulator, a conductor, or a polycrystalline semiconductor. The major surface can have a topography that changes in the x, y, and z directions.